AI Augmented by Memristors

 

Prof. J. Joshua Yang

IEEE Fellow
University of Southern California, USA

 

Tutorial Introduction:

The rapid scaling of artificial intelligence (AI) has exposed fundamental challenges in energy efficiency and processing throughput that are difficult to overcome with conventional von Neumann architectures. Memristors—nanoscale resistive devices with nonvolatile, analog, and history-dependent behavior—offer a promising pathway to augment AI systems directly at the hardware level. This tutorial introduces AI augmented by memristors, drawing on recent advances in memristive materials, devices, and computing architectures.

The tutorial begins with a concise introduction to memristors, highlighting their physical mechanisms, programmability, and robustness under aggressive scaling and harsh operating conditions. It then examines memristor-based machine learning hardware accelerators, with an emphasis on in-memory computing architectures that perform vector–matrix multiplication directly within memristive arrays, substantially reducing data movement and improving energy efficiency and throughput for deep learning workloads.

Moving beyond static weight storage, the tutorial focuses on neuromorphic computing enabled by the intrinsic dynamical properties of memristors, including nonlinearity, stochasticity, and diffusion dynamics. These properties enable native implementations of synaptic plasticity, temporal information processing, and close integration with sensors, supporting brain-inspired and time-dependent AI paradigms that are difficult to realize efficiently using purely digital hardware.

By bridging devices, circuits, and algorithms, this tutorial presents a unified perspective on how memristors can both accelerate existing AI workloads and enable new neuromorphic computing paradigms, pointing toward scalable, energy-efficient, and adaptive AI hardware for the post-Moore era.

 

Speaker Biography:

Dr. J. Joshua Yang is the Arthur B. Freeman Chair professor of Electrical and Computer Engineering in the Ming Hsieh Department of Electrical and Computer Engineering. He joined USC in 2020, coming from the faculty of the University of Massachusetts, Amherst. Specializing in post-CMOS hardware for neuromorphic computing, machine learning, and artificial intelligence, he has published many groundbreaking research papers in these domains. His innovative work has led to the granting of over 120 US patents. He is the Associate Editor of Science Advances on neuromorphic topics and the Founding Chair of the IEEE Neuromorphic Computing Technical Committee (2021). He serves as the director of an Air Force-funded Center of Excellence on Neuromorphic Computing at USC. Recognized as a Clarivate Highly Cited Researcher and listed among the Top Best Scientists in the Electronics and Electrical Engineering category by Research.com, he was elected Fellow of the IEEE (2022) and of the National Academy of Inventors (NAI) (2023), for his contributions to resistive switching materials and devices for nonvolatile memory and neuromorphic computing.